A CMOS Analog FIR Filter with Low Phase Distortion

摘要

The FIR function of the proposed filter is realized byrnintegrating weighted signal currents in a given timernwindow on a capacitor. The input signal voltage isrnweighted into multiple voltages according to the FIRrnrequirement through a resistor ladder. A switchingrnnetwork sequentially connects the weighted voltages to arnlinear transconductor which converts the voltage torncurrent and charges the capacitor. The resultingrncapacitor voltage becomes the filter output, periodicallyrnavailable between integration and reset. In such a FIRrnfilter, the hardware cost is de-linked to the number ofrntaps. The filter was implemented in a 0.35μm CMOSrnprocess. The measured side-band attenuation reaches 60rndB while the group delay is smaller than 11 ns, with arnpower consumption of about 35 mW at 3.3 V.