Triple Gate Oxide by nitrogen implantation integrated in a 0.13μm CMOS flow

摘要

Nitrogen implantation was used to locally delay the gate oxidation rate on the wafer: this technique, implemented in a standard 0.13μm dual gate oxide flow, allows to get three different gate oxide on the same wafer. Dry and wet RTO processes have been tested to optimize the oxidation delays from a minimum nitrogen implanted dose. Finally, functional 0.13μm CMOS devices with T_(ox)=1.7/2.3/6.5nm have been processed on the same wafer: devices performances and gate oxide characteristics are presented here and compared to reference standard DGO devices.