There are forces exerted on these encapsulated components during the solder mount process that can generate new failure sites within the components. These failure sites can lead to failures well below the test voltages that these devices were exposed to during their 100% electrical testing in manufacturing. These forces are mechanical in nature but thermal in creation. Once the part is soldered to the board, subsequent electrical testing defines the proof capability of the device. Failures are uncovered when the stress applied is equal to or greater than the breakdown capability of the dielectric. Factors influencing the number of failures include the condition and capability of the dielectric in its post-manufactured state, and the conditions experienced in the solder process.
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