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CMOS compatible pinpointed fabrication of nanoscale silicon oxide islands array

机译:CMOS兼容的纳米级氧化硅岛阵列的精确制造

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摘要

In this paper, a novel method is introduced to fabricate nanoscale silicon oxide islands array. Rectangle islands patterns with edge length less than 100 nm are fabricated by traditional contact lithography and buffered oxide etching process. Precise sacrificial layer etching technique is used to control the size of islands from micro-scale to nanoscale accurately. This fabrication method is CMOS compatible and can realize mass production of nanoscale patterns array in very low cost.
机译:本文介绍了一种新颖的纳米级氧化硅岛阵列的制备方法。边缘长度小于100 nm的矩形岛图案是通过传统的接触光刻技术和缓冲氧化物蚀刻工艺制成的。精确的牺牲层蚀刻技术用于精确控制从微尺度到纳米尺度的岛的大小。该制造方法与CMOS兼容,并且可以以非常低的成本实现纳米级图案阵列的批量生产。

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