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Simple method for ADC characterization under the frame of digital PM and AM noise measurement

机译:在数字PM和AM噪声测量框架下进行ADC表征的简单方法

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摘要

The last years improvements of electronic circuits has allowed the appliance of digital systems in phase noise measurement techniques where low noise and high accuracy are required, yielding flexibility in the implementation and setup of measurement systems. By definition, any measure performed is always affected and limited by the noise of the measurement instrument itself. Considering that the Analog to Digital Converter (ADC) is the core and front end of digital systems, its residual noise has an important impact on the system performance. Consequently, the selection of the proper ADC becomes a critical issue for the system implementation. Currently, the information available in literature deeply describes the ADC features mainly at frequencies offsets far-from-carrier. Nevertheless for time and frequency applications the performance close to the carrier is an important concern as well. In this paper, a simple method for ADC characterization is proposed based on the Phase Locked Loop (PLL) definition and on Phase and Amplitude Modulation (PM/AM) measurements, focused in obtaining the relevant information of ADC noise contributions for phase noise measurement applications. The purpose of such a method is to find the parameters of a state ADC noise model using a technique which avoids the use of complex hardware and allows having a low computational costs performance.
机译:过去几年中,电子电路的改进使数字系统得以应用在要求低噪声和高精度的相位噪声测量技术中,从而在测量系统的实施和设置方面产生了灵活性。根据定义,所执行的任何测量始终会受到测量仪器本身的噪声的影响和限制。考虑到模数转换器(ADC)是数字系统的核心和前端,其残留噪声对系统性能具有重要影响。因此,选择合适的ADC成为系统实施的关键问题。当前,文献中可获得的信息主要在远离载波的频率偏移处深度描述了ADC的功能。然而,对于时间和频率应用,接近载波的性能也是一个重要的问题。本文基于锁相环(PLL)定义和相位和幅度调制(PM / AM)测量,提出了一种简单的ADC表征方法,着重于获取有关相位噪声测量应用中ADC噪声贡献的相关信息。 。这种方法的目的是使用一种避免使用复杂硬件并允许具有低计算成本性能的技术来找到状态ADC噪声模型的参数。

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