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Capacitance Model for Four-Terminal DG MOSFETs

机译:四端子DG MOSFET的电容模型

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摘要

We present an intrinsic capacitance model for undoped-channel full-deplete DG MOSFETs with two independent gates of different gate-oxide thickness. The basis of the model is double charge-sheet four-terminal compact model of DG MOSFET with carrier velocity saturation. We considered five intrinsic capacitances C_(G1S), C_(G1D), C_(G2S), C_(G2D), and C_(G1G2). Since total charge in the channel can be calculated analytically, these capacitances are obtained by differentiating it. Anomaly of C_(G1G2) was found in the sub-threshold region when the transistor is in the double charge-sheet mode. This can be explained by the redistribution of the carriers between two charge-sheets when the gate voltages is changed, resulting in the screening current against the perpendicular electric field. To remedy this effect, it was found that the charge-sheets should be placed at the mean position of the carriers, instead at the silicon-insulator interface.
机译:我们为具有两个不同栅极氧化层厚度的独立栅极的非掺杂沟道全耗尽DG MOSFET提出了本征电容模型。该模型的基础是具有载流子速度饱和的DG MOSFET的双电荷片四端紧凑模型。我们考虑了五个固有电容C_(G1S),C_(G1D),C_(G2S),C_(G2D)和C_(G1G2)。由于可以分析计算通道中的总电荷,因此可以通过微分获得这些电容。当晶体管处于双电荷片模式时,在亚阈值区域中发现了C_(G1G2)异常。这可以通过改变栅极电压时载流子在两个电荷片之间的重新分布来解释,从而产生针对垂直电场的屏蔽电流。为了纠正这种影响,我们发现电荷表应放置在载流子的平均位置,而不是硅-绝缘体界面。

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