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A viterbi decoder/modulator ASIC for up band CDMA PCS base station

机译:用于上行CDMA PCS基站的维特比解码器/调制器ASIC

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A high speed Viterbi decoder (VD) and modulator ASIC for a base station in up band DS-CDMA-PCS has been developed using 0.35 mu m CMOS technology with 210 K gates. For VD, eight add-compare-select units are used for reducing the decoding time. Full decoding depth is used in VD to get the better coding gain. The modulator block is designed to perform transmitter function of 8 forward CDMA channels. According to J-STD-008 standard, the symbol energy shall have four different values according to symbol rate and so a baseband filter should support at least 4 different is used for this requirement. Baseband filter is most complex block in forward CDMA channel processing and shared with 8 channels for chip area reduction.
机译:使用0.35μmCMOS技术和210 K栅极,开发了用于上行DS-CDMA-PCS基站的高速维特比解码器(VD)和调制器ASIC。对于VD,八个加法比较选择单元用于减少解码时间。在VD中使用完整的解码深度以获得更好的编码增益。调制器模块设计为执行8个前向CDMA信道的发射机功能。根据J-STD-008标准,符号能量应根据符号速率具有四个不同的值,因此,此要求使用的基带滤波器应支持至少四个不同的值。基带滤波器是前向CDMA通道处理中最复杂的模块,与8个通道共享以减少芯片面积。

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