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Implementation of Embedded Cores-Based Digital Devices in JBits Java Simulation Environment

机译:JBits Java仿真环境中基于嵌入式内核的数字设备的实现

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摘要

This paper proposes test design architecture suitable for built-in self-testing (BIST) of embedded cores-based digital circuits by using a reconfigur-able device. In the paper, a sample circuit under test (CUT) and its corresponding space compressor were realized in Java language, downloaded, and then tested at runtime in a simulation environment written in JBits.
机译:本文提出了一种测试设计架构,该架构适用于使用可重构设备的嵌入式基于内核的数字电路的内置自测试(BIST)。在本文中,用Java语言实现了一个被测样品电路(CUT)及其相应的空间压缩器,进行了下载,然后在用JBits编写的仿真环境中进行运行时测试。

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